Integrated circuits (ICs) often include disparate types of integrated devices that exhibit different speed performance. In a common example, typical integrated memory devices include input and output (I/O) circuitry that communicates with arrays of memory cells. I/O circuitry and memory cells are typically implemented using markedly different circuit technologies, and consequently exhibit performance asymmetry that complicates optimization of overall device performance. Adding still more complexity, performance improves at different rates for different circuit technologies, so performance disparities between circuits common to a given IC device can increase over time.
In a specific example, dynamic-random-access memory (DRAM) IC devices include I/O circuitry that communicates data between a memory core and an external memory controller. The speed performance of the I/O circuitry has been increasing faster than that of the memory core. The resulting performance asymmetry enables DRAM IC devices to reduce the requisite number of command, address, and data lines. However, as the I/O speed performance continues to increase, DRAM devices may have trouble processing commands as fast as the I/O circuitry is capable of delivering them.